Device Number1 | PGC1K | PGC2K | PGC4K | PGC7K | PGC10K | ||
Logic resources | LUT4 equivalent | 1276 | 2428 | 4761 | 7104 | 9907 | |
Flip-Flops | 1596 | 3036 | 5952 | 8880 | 12384 | ||
RAM resources | Distributed RAM(Kbit) | 11 | 16 | 39 | 56 | 78 | |
Embedded 9K block RAM | 7 | 8 | 11 | 26 | 45 | ||
Memory blocks(Kbit) | 63 | 72 | 99 | 234 | 405 | ||
Flash resources | Maximum embedded Flash capacity available to users(Kbits)2 | 350 | 80 | 1520 | 2070 | 3016 | |
Clock resources | Phase Locked Loop (PLL)/Global Clock | 1/16 | 2/16 | 2/16 | 2/16 | 2/16 | |
I/O resources | IO Banks | 4 | 6 | 6 | 6 | 6 | |
Maximum user I/Os | 207 | 207 | 280 | 336 | 384 | ||
Maximum differential pairs | 14 | 14 | 18 | 21 | 24 | ||
Hard core resources | I2C hard core | 2 | 2 | 2 | 2 | 2 | |
SPI hard core | 1 | 1 | 1 | 1 | 1 | ||
Timer/counter hard core | 1 | 1 | 1 | 1 | 1 | ||
On-chip oscillator | 1 | 1 | 1 | 1 | 1 | ||
Power-up initiation time (ms) | 2.264 | 2.264 | 3 | 4.67 | 7.3 | ||
Package | Dimensions(mm) | Ball Pitch(mm) | User I/O / Differential pairs | ||||
UWG364 | 2.5 x 2.5 | 0.4 | 29/33 | ||||
UWG49 | 3.2 x 3.2 | 0.4 | 39/5 | ||||
UWG81 | 3.8 x 3.8 | 0.4 | 64/10 | ||||
SSBG256 | 9 x 9 | 0.5 | 207/14 | 207/14 | |||
LPG100 | 14 x 14 | 0.5 | |||||
LPG144 | 20 x 20 | 0.5 | 112/4 | 112/4 | 115/9 | 115/9 | |
MBG256 | 14 x 14 | 0.8 | 207/14 | 207/14 | 207/18 | 207/19 | |
FBG256 | 17 x 17 | 1 | 207/14 | 207/14 | 207/18 | ||
MBG324 | 15 x 15 | 0.8 | 280/18 | ||||
MBG400 | 17 x 17 | 0.8 | 336/21 | ||||
MBG484 | 19 x 19 | 0.8 | 384/24 | ||||
Notes: 1、PGC1K/PGC2K support version G (General) and version L (Low-Power) devices; PGC4K supports version L and version D (Dual Boot function) devices; PGC7K/PGC10K support version D devices. 2、Remaining maximum Flash capacity when not using the Dual Boot function. 3、29/3 indicates 29 user I/Os and 3 pairs of true differential output pins; the other numbers follow the same pattern. 4、UWG and SSBG packages are only available in the 1.2 V low-voltage version. |
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